One workspace. One unified flow. — built for modern hardware design.
SiliFlow was built to answer a straightforward engineering question: why should hardware designers need a fragmented shelf of disconnected tools just to inspect a simulation? This is the story of why we started building.
SiliFlow is a desktop IDE that walks a chip from RTL to GDS2 — with every stage verdict shown beside the code.
Chip design today is scattered: one vendor app to simulate, another to synthesize, a third to lint, a fourth to time-analyze — each with its own install ritual, its own license server and its own Tcl dialect. SiliFlow puts the whole flow in one workspace. You open a project, press run on the stage you need, and read the result right next to the line that produced it.
Simulation is live today — drop in raw-source RTL, get waveforms, click from a signal back to the source that drove it. Synthesis is next on the public roadmap; lint, CDC, RDC, DFT and STA follow one stage at a time, shaped by what designers ask for. The last stop is layout: GDS2, ready for the fab.
It is a real GUI application — buttons, panels, waveforms, not a shell prompt — running native on Windows, Linux and macOS. A compiled core keeps it fast: cold start in seconds, modest memory, no typos-waiting-while-you-type. Everything runs locally; your netlists and GDS2 never upload anywhere.
Model: free for students, hobbyists and anyone who wants to learn. Companies pay one simple license — no seat-counting rituals, no reloadable dongles.
- ✓★ 8 STAGES · ONE WORKSPACE
- ✓★ SIMULATION LIVE · WAVEVIEWER + CROSS-PROBE
- ✓★ SYNTHESIS NEXT · PUBLIC ROADMAP
- ✓★ REAL GUI · TERMINALS NOT REQUIRED
- ✓★ NATIVE · WINDOWS / LINUX / MACOS
- ✓★ STARTS IN SECONDS · STAYS OUT OF YOUR WAY
- ✓★ RAW-SOURCE RTL IN · RESULTS BESIDE THE CODE
- ✓★ FREE FOR LEARNERS · SIMPLE COMPANY LICENSE
JIGNESH GIRI — FOUNDER, SILIFLOW
- FOUNDER
- JIGNESH GIRI
- BIO
- 50% STUDENT, 50% REVENGE ARC
- ENGINEERING
- ELECTRONICS ENGINEER
- MOTTO
- JUST SHOW ME THE WAVE
So you want to learn hardware design. How wonderful.
Grab a coffee, because you're about to spend the weekend on everything except hardware design.
First, the commercial EDA suite. A multi-gigabyte installer, a license daemon with the emotional stability of a cat, and a pricing page that just says “Contact Sales.” Nothing says welcome, student like a sales call.
Prefer open source? Of course you do. Enjoy the full-contact scavenger hunt: a package manager, three PATH variables, a separate waveform viewer, and one command-line flag you'll mistype at 2 a.m. while questioning your career. You wanted to inspect a simulation. You now maintain an infrastructure project.
Meanwhile, software engineers open VS Code, press run, and go get lunch.
Hardware engineers get a ritual sacrifice to the shell gods.
I got tired of watching smart people quit before they ever wrote a state machine, so I built SiliFlow.
No license daemons. No fragile shell scripts. No sales calls. Just a fast, native desktop studio that stays out of your way so you can do the thing you came here for: build circuits.
Revolutionary, apparently.
“If your first EDA skill is debugging the installer, the tool failed. Not you.”
▲ NOW
Simulation that just works
The beta simulates raw RTL today and streams waveforms cross-probed with your source. Try it — it is free.
▷ NEXT
Synthesis in the same window
Elaborate to netlist with timing and area reports, annotated onto the same editor you write in.
■ PLANNED
The full road to GDS2
Lint, CDC, RDC, DFT, STA and formal — and layout ready for the fab. One stage, one public vote at a time.